TI380C30A Datasheet, PDF (65/81 Pages) Texas Instruments – INTEGRATED TOKEN-RING COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE

TI380C30A
INTEGRATED TOKEN-RING COMMPROCESSOR
AND PHYSICAL-LAYER INTERFACE
SPWS034 – MARCH 1998
SCS
SRSX
SRS0
Valid
SRS1
267
268
SIACK
273a
SRNW
272
SUDS
SLDS
SDDIR
High
273
286
SDBEN
282R
279
283R
276
275
282a
255
SDTACK†
Hi-Z
Hi-Z
261
SADH0–SADH7
259
260
261a
SADL0–SADL7
SPH
Hi-Z
Output Data Valid
Hi-Z
SPL
† _{SDTACK is an active-low bus-ready signal. It must be asserted before data output.}
Figure 28. 68xxx DIO Read Cycle
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