TI380C30A Datasheet, PDF (19/81 Pages) Texas Instruments – INTEGRATED TOKEN-RING COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE

TI380C30A
INTEGRATED TOKEN-RING COMMPROCESSOR
AND PHYSICAL-LAYER INTERFACE
SPWS034 – MARCH 1998
protocol handler (continued)
The PH contains many state machines that perform the following functions:
D Transmit and receive frames
D Capture tokens
D Provide token-priority controls
D Manage the TI380C30A buffer memory
D Provide frame-address recognition (group, specific, functional, and multicast)
D Provide internal parity protection
D Control and verify the physical-layer circuitry-interface signals
Integrity of the transmitted and received data is controlled by cyclic-redundancy checks (CRC), detection of
network-data violations, and parity on internal data paths. All data paths and registers are optionally
parity-protected to maintain functional integrity.
clock generator (CG)
The CG performs the generation of all internal clocks required by the other functional blocks, including the local
memory-bus clocks (MBCLK1, MBCLK2). The CG also generates the reference timer used to sample all input
clocks (SBCLK, OSCIN, RCLK, and PXTAL). If no transition is detected within the period of the reference timer
on any input clock signal, the CG places the TI380C30A into slow-clock mode. The frequency of the reference
timer is in the range of 10 kHz–100 kHz.
adapter-support function (ASF)
The ASF performs support functions not contained in the other blocks. The features are:
D The TI380C30A base timer
D Identification, management, and service of internal and external interrupts
D Test-pin mode control, including the unit-in-place mode for board testing
D Checks for illegal states, such as illegal opcodes and parity
physical-layer interface (PHY)
The major blocks of the TI380C30A PHY include the receiver/equalizer, clock recovery PLL, wrap function,
phantom drive with wire-fault detector, and watchdog timer. Figure 2 is the block diagram illustrating these major
blocks, and the functionality of each block is described in the following sections.
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