TI380C30A Datasheet, PDF (39/81 Pages) Texas Instruments – INTEGRATED TOKEN-RING COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE

TI380C30A
INTEGRATED TOKEN-RING COMMPROCESSOR
AND PHYSICAL-LAYER INTERFACE
SPWS034 – MARCH 1998
VDD
ÏÏÏÏÏϹ⁰⁰
101
SBCLK ^{ÌÌÌÌÌÌÌÌÌÌÌÌ}
OSCIN ^{ÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌ10ÌÌÌ2}
MBCLK1 ^{ÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌÌ}
MBCLK2 ^{ÌÌÌÌÌÌÌÌÌÌÌÌ}
Minimum VDD-High Level
103
106
106
104
105
107
108
110
109
110
111
117
SRESET _{ÌÌÌÌÌÌÌÌÌÌ}
118
119
288
289
ÏÏ _S8/SHALT
ÏÏÏÏ _{NOTE A: To represent the information in one illustration, nonactual phase and timebase characteristics are shown. Refer to specified}
parameters for precise information.
Figure 9. Power-Up, System Clocks, SYNCIN, and SRESET
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39