TI380C30A Datasheet, PDF (37/81 Pages) Texas Instruments – INTEGRATED TOKEN-RING COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE

TI380C30A
INTEGRATED TOKEN-RING COMMPROCESSOR
AND PHYSICAL-LAYER INTERFACE
SPWS034 – MARCH 1998
clock and data switching characteristics over recommended range of supply voltage,
t_c(XT1) = 125 ns (see Figure 8)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
tc(XT1)
tw(OSC32H)
tw(OSC32L)
Cycle time of clock applied to XT1
Pulse duration, OSC32 high
Pulse duration, OSC32 low
tw(PXTALL) Pulse duration, PXTAL low
125
ns
10
ns
12
ns
16-Mbit/s mode
12
ns
4-Mbit/s mode
46
tw(PXTALH) Pulse duration, PXTAL high
16-Mbit/s mode
10
ns
4-Mbit/s mode
46
tw(RCLKL) Pulse duration, RCLK low
16-Mbit/s mode
12
ns
4-Mbit/s mode
46
tw(RCLKH) Pulse duration, RCLK high
16-Mbit/s mode
10
ns
4-Mbit/s mode
46
tsu(RCVR) Setup time, RCVR valid to RCLK rising edge
16-Mbit/s mode
18
ns
th(RCVR)
Hold time, RCVR valid after RCLK rising edge
16-Mbit/s mode
1
ns
PXTAL
OSC32
tw(PXTALH)
tw(PXTALL)
tw(OSC32H)
tw(OSC32L)
2V
0.8 V
2V
0.8 V
tw(RCLKH)
tw(RCLKL)
RCLK
2V
0.8 V
tsu(RCVR)
RCVR^{ÌÌÌÌÌÌÌÌÌÌ}
ÌÌ^th(RÌÌ^CVÌÌ^R) ÌÌÌÌ
2V
0.8 V
Figure 8. PXTAL, OSC32, RCLK, and RCVR
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