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TI380C30A Datasheet, PDF (34/81 Pages) Texas Instruments – INTEGRATED TOKEN-RING COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE
TI380C30A
INTEGRATED TOKEN-RING COMMPROCESSOR
AND PHYSICAL-LAYER INTERFACE
SPWS034 – MARCH 1998
timing parameter symbology
Some timing parameter symbols have been created in accordance with JEDEC Standard 100-A. To shorten
the symbols, some of the signal names and other related terminology have been abbreviated as:
DR
DRN
OSC
RS
SCK
VDD
DRVR
DRVR
OSCIN
SRESET
SBCLK
VDDL, VDD
Lower-case subscripts are defined as:
c Cycle time
d Delay time
h Hold time
r Rise time
sk Skew
su Setup time
t Transition time
w Pulse duration
The following additional letters and phrases are defined as:
L
H
V
Z
Falling edge
Rising edge
Low
High
Valid
High impedance
No longer high
No longer low
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