TI380C30A Datasheet, PDF (45/81 Pages) Texas Instruments – INTEGRATED TOKEN-RING COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE

MAX0
MAX2
MROMEN
MAXPH, MAXPL
MADH0–MADH7
MADL0–MADL7
MRAS
MCAS
MOE
MBIAEN
MBEN
MDDIR
Address/
Enable
Address
TI380C30A
INTEGRATED TOKEN-RING COMMPROCESSOR
AND PHYSICAL-LAYER INTERFACE
SPWS034 – MARCH 1998
Address
Address/
Status
33
35
Data/Parity
Address
36
37
38
39
40
45
41
42
44
43
46
47
49a
48a
51a
50a
52a
49
48
51
50
52
53
54
55
Figure 13. Memory-Bus Read Cycle
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