TI380C30A Datasheet, PDF (67/81 Pages) Texas Instruments – INTEGRATED TOKEN-RING COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE

TI380C30A
INTEGRATED TOKEN-RING COMMPROCESSOR
AND PHYSICAL-LAYER INTERFACE
SPWS034 – MARCH 1998
SCS
SRSX
SRS0
Valid
SRS1
267
268
SIACK
272
SRNW
273a
273
SUDS
SLDS†
272a
280
286
273a
SDDIR
282W
283W
SDBEN‡
SDTACK§
276
Hi-Z
279
275
255
Hi-Z
SADH0–SADH7
SADL0–SADL7
SPH
Hi-Z
SPL
263
282b
262
Data
Hi-Z
† _{For 68xxx mode, skew between SLDS and SUDS must not exceed 10 ns. Provided this limitation is observed, all events referenced to a data}
strobe edge use the later occurring edge. Events defined by two data strobes, edges, such as parameter 286, are measured between latest
and earlier edges.
‡ _{When the TMS380C25 begins to drive SDBEN inactive, it has already latched the write data internally. Parameter 263 must be met to the input}
of the data buffers.
§ _{SDTACK is an active-low bus ready signal. It must be asserted before data output.}
Figure 29. 68xxx DIO Write Cycle
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