TI380C30A Datasheet, PDF (32/81 Pages) Texas Instruments – INTEGRATED TOKEN-RING COMMPROCESSOR AND PHYSICAL-LAYER INTERFACE

TI380C30A
INTEGRATED TOKEN-RING COMMPROCESSOR
AND PHYSICAL-LAYER INTERFACE
SPWS034 – MARCH 1998
electrical characteristics over recommended ranges of supply voltage and operating case
temperature (unless otherwise noted) (continued)
receiver input (RCV+ and RCV–)
PARAMETER
TEST CONDITIONS
MIN MAX UNIT
VB
Receiver-input bias voltage
VT+
Rising-input threshold voltage
See Note 12
VICM = VSB, Rtst = 330 Ω,
See Notes 12, 13, and Figure 6
VSB–1 VSB+1 V
50 mV
VT–
Falling-input threshold voltage
VICM = VSB, Rtst = 330 Ω,
See Notes 12, 13, and Figure 6
–50
mV
VAT
Asymmetry threshold voltage, (VT+ + VT–)/2
VICM = VSB, Rtst = 330 Ω,
See Notes 12, 13, and Figure 6
–15
15 mV
Vr(CM)
Rising-input common-mode rejection
[VT+ (@VSB + 0.5 V) – VT+ (@VSB – 0.5 V) ]
See Notes 12, 13, and Figure 6
–30
Vf(CM)
Falling-input common-mode rejection
[VT+ (@VSB + 0.5 V) – VT+ (@VSB – 0.5 V) ]
See Notes 12, 13, and Figure 6
–30
Both inputs at VSB, See Note 12 and Figure 6
–10
II(RCVR) Receiver input current
Input under test at VSB + 1 V,
Other input at VSB – 1 V,
10
See Notes 12 and 13 and Figure 6
30 mV
30 mV
10
60 _µA
IEQB
Equalizer bias current
Rtst = 330 Ω, Input under test at VSB – 1 V,
Other input at VSB + 1 V, See Note 12
RCV+ at 4 V, RCV– at 1 V or RCV+ at 1 V,
RCV– at 4 V, See Figure 6
–10
–60
1.0
2.2 mA
VEQW
Equalizer wrap voltage
WRAP = low, See Figure 6
300
700 mV
NOTES: 12. VSB is the self-bias voltage of the input pair RCV+ and RCV–. It is defined as VSB = (VSB+ +VSB–) ÷2 (where VSB+ is the self-bias
voltage of RCV+; VSB– is the self-bias voltage of RCV–). The self-bias voltage of both pins is approximately VDD÷2.
13. VICM is the common-mode voltage applied to RCV+ and RCV–.
phantom driver (PHOUTA and PHOUTB)
PARAMETER
TEST CONDITIONS
MIN MAX UNIT
VOH High-level output voltage
IOS
IOL
IOZH
IOZL
Short-circuit output current
Low-level output current
Off-state output current with high-level voltage applied
Off-state output current with low-level voltage applied
IOH = –1 mA
IOH = –2 mA
VO = 0 V
VO = VDD
VO = VDD
VO = 0 V
4.1
V
3.8
V
–4 –20 mA
1
10 mA
–100 100 µA
–100 100 µA
wire fault (WFLT) (see Notes 14 and 15)
PARAMETER
MIN MAX UNIT
RLS Phantom load resistance detected as short circuit
0.15 kΩ
RLO Phantom load resistance detected as open circuit
50
kΩ
RLN Phantom load resistance detected as normal
2.9 5.5 kΩ
NOTES: 14. The wire-fault circuit recognizes a fault condition for any phantom-drive load resistance to ground of greater than RLO or any load
resistance less than RLS. Any resistance in the range specified for RLN is not recognized as a wire fault. A fault condition on either
PHOUTA or PHOUTB results in the WFLT signal being asserted (low).
15. Resistor (RLS, RLO, RLN) connected from output under test to ground, other output loaded with 4.1 Ω to ground.
PLL characteristics
PARAMETER
TEST CONDITIONS
MIN MAX UNIT
VFILT Reference PLL operating filter voltage
tc(XT1) = 125 ns
1.8
4V
32
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265