LAN9311 Datasheet, PDF (454/461 Pages) SMSC Corporation – Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
15.5.10 Microwire Timing
This section specifies the Microwire EEPROM interface timing requirements. Please refer to Section
10.2.3, "Microwire EEPROM," on page 145 for a functional description of this serial interface.
EECS
EECLK
EEDO
EEDI
EEDI (VERIFY)
t_cshckh
t_ckcyc
t_ckh t_ckl
t_dvckh t_ckhdis
t_csl
t_cklcsl
t_ckldis
t_dsckh
t_dhckh
t_cshdv
Figure 15.10 Microwire Timing
t_dhcsl
SYMBOL
t_ckcyc
t_ckh
t_ckl
t_cshckh
t_cklcsl
t_dvckh
t_ckhdis
t_dsckh
t_dhckh
t_ckldis
t_cshdv
t_dhcsl
t_csl
Table 15.14 Microwire Timing Values
DESCRIPTION
EECLK cycle time
EECLK high time
EECLK low time
EECS high before rising edge of EECLK
EECLK falling edge to EECS low
EEDO valid before rising edge of EECLK
EEDO disable after rising edge of EECLK
EEDI setup to rising edge of EECLK
EEDI hold after rising edge of EECLK
EECLK low to EEDO data disable
EEDI valid after EECS high (VERIFY)
EEDI hold after EECS low (VERIFY)
EECS low
MIN
1110
550
550
1070
30
550
550
90
0
580
0
1070
TYP
MAX
1130
570
570
600
UNITS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
Revision 2.0 (02-14-13)
454
DATASHEET
SMSC LAN9311/LAN9311i