LAN9311 Datasheet, PDF (171/461 Pages) SMSC Corporation – Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
Table 14.1 System Control and Status Registers (continued)
ADDRESS
OFFSET
SYMBOL
REGISTER NAME
13Ch
140h
144h
148h
14Ch
150h
154h
158h
15Ch
160h
164h
168h
16Ch
170h
174h
178h
17Ch
180h
184h
188h
18Ch
190h
194h
198h
19Ch
1588_SRC_UUID_LO_TX_CAPTURE_2
1588_CLOCK_HI_RX_CAPTURE_MII
1588_CLOCK_LO_RX_CAPTURE_MII
1588_SEQ_ID_SRC_UUID_HI_RX_CAPTURE_MII
1588_SRC_UUID_LO_RX_CAPTURE_MII
1588_CLOCK_HI_TX_CAPTURE_MII
1588_CLOCK_LO_TX_CAPTURE_MII
1588_SEQ_ID_SRC_UUID_HI_TX_CAPTURE_MII
1588_SRC_UUID_LO_TX_CAPTURE_MII
1588_CLOCK_HI_CAPTURE_GPIO_8
1588_CLOCK_LO_CAPTURE_GPIO_8
1588_CLOCK_HI_CAPTURE_GPIO_9
1588_CLOCK_LO_CAPTURE_GPIO_9
1588_CLOCK_HI
1588_CLOCK_LO
1588_CLOCK_ADDEND
1588_CLOCK_TARGET_HI
1588_CLOCK_TARGET_LO
1588_CLOCK_TARGET_RELOAD_HI
1588_CLOCK_TARGET_RELOAD_LO
1588_AUX_MAC_HI
1588_AUX_MAC_LO
1588_CONFIG
1588_INT_STS_EN
1588_CMD
Port 2 1588 Source UUID Low-DWORD Transmit Capture
Register, Section 14.2.5.8
Port 0 1588 Clock High-DWORD Receive Capture
Register, Section 14.2.5.1
Port 0 1588 Clock Low-DWORD Receive Capture Register,
Section 14.2.5.2
Port 0 1588 Sequence ID, Source UUID High-WORD
Receive Capture Register, Section 14.2.5.3
Port 0 1588 Source UUID Low-DWORD Receive Capture
Register, Section 14.2.5.4
Port 0 1588 Clock High-DWORD Transmit Capture
Register, Section 14.2.5.5
Port 0 1588 Clock Low-DWORD Transmit Capture
Register, Section 14.2.5.6
Port 0 1588 Sequence ID, Source UUID High-WORD
Transmit Capture Register, Section 14.2.5.7
Port 0 1588 Source UUID Low-DWORD Transmit Capture
Register, Section 14.2.5.8
GPIO 8 1588 Clock High-DWORD Capture Register,
Section 14.2.5.9
GPIO 8 1588 Clock Low-DWORD Capture Register,
Section 14.2.5.10
GPIO 9 1588 Clock High-DWORD Capture Register,
Section 14.2.5.11
GPIO 9 1588 Clock Low-DWORD Capture Register,
Section 14.2.5.12
1588 Clock High-DWORD Register, Section 14.2.5.13
1588 Clock Low-DWORD Register, Section 14.2.5.14
1588 Clock Addend Register, Section 14.2.5.15
1588 Clock Target High-DWORD Register,
Section 14.2.5.16
1588 Clock Target Low-DWORD Register,
Section 14.2.5.17
1588 Clock Target Reload High-DWORD Register,
Section 14.2.5.18
1588 Clock Target Reload/Add Low-DWORD Register,
Section 14.2.5.19
1588 Auxiliary MAC Address High-WORD Register,
Section 14.2.5.20
1588 Auxiliary MAC Address Low-DWORD Register,
Section 14.2.5.21
1588 Configuration Register, Section 14.2.5.22
1588 Interrupt Status Enable Register, Section 14.2.5.23
1588 Command Register, Section 14.2.5.24
SMSC LAN9311/LAN9311i
171
DATASHEET
Revision 2.0 (02-14-13)