LAN9311 Datasheet, PDF (313/461 Pages) SMSC Corporation – Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
Table 14.12 Indirectly Accessible Switch Control and Status Registers (continued)
REGISTER #
0852h
0853h
0854h
0855h
0856h
0857h
0858h
0859h
085Ah
085Bh
085Ch
085Dh
085Eh
085Fh
0860h
0861h
0862h
0863h
0864-087Fh
0880h
0881h
0882h-0BFFh
0C00h
0C01h
SYMBOL
REGISTER NAME
MAC_TX_PAUSE_CNT_1 Port 1 MAC Transmit Pause Count Register, Section 14.5.2.26
MAC_TX_PKTOK_CNT_1 Port 1 MAC Transmit OK Count Register, Section 14.5.2.27
MAC_RX_64_CNT_1
Port 1 MAC Transmit 64 Byte Count Register, Section 14.5.2.28
MAC_TX_65_TO_127_CNT_1
Port 1 MAC Transmit 65 to 127 Byte Count Register,
Section 14.5.2.29
MAC_TX_128_TO_255_CNT_1 Port 1 MAC Transmit 128 to 255 Byte Count Register,
Section 14.5.2.30
MAC_TX_256_TO_511_CNT_1 Port 1 MAC Transmit 256 to 511 Byte Count Register,
Section 14.5.2.31
MAC_TX_512_TO_1023_CNT_1 _{Port 1 MAC Transmit 512 to 1023 Byte Count Register,}
Section 14.5.2.32
MAC_TX_1024_TO_MAX_CNT_1 _{Port 1 MAC Transmit 1024 to Max Byte Count Register,}
Section 14.5.2.33
MAC_TX_UNDSZE_CNT_1 Port 1 MAC Transmit Undersize Count Register,
Section 14.5.2.34
RESERVED
Reserved for Future Use
MAC_TX_PKTLEN_CNT_1 Port 1 MAC Transmit Packet Length Count Register,
Section 14.5.2.35
MAC_TX_BRDCST_CNT_1 Port 1 MAC Transmit Broadcast Count Register,
Section 14.5.2.36
MAC_TX_MULCST_CNT_1 Port 1 MAC Transmit Multicast Count Register,
Section 14.5.2.37
MAC_TX_LATECOL_1
Port 1 MAC Transmit Late Collision Count Register,
Section 14.5.2.38
MAC_TX_EXCOL_CNT_1
Port 1 MAC Transmit Excessive Collision Count Register,
Section 14.5.2.39
MAC_TX_SNGLECOL_CNT_1 Port 1 MAC Transmit Single Collision Count Register,
Section 14.5.2.40
MAC_TX_MULTICOL_CNT_1
Port 1 MAC Transmit Multiple Collision Count Register,
Section 14.5.2.41
MAC_TX_TOTALCOL_CNT_1
Port 1 MAC Transmit Total Collision Count Register,
Section 14.5.2.42
RESERVED
Reserved for Future Use
MAC_IMR_1
Port 1 MAC Interrupt Mask Register, Section 14.5.2.43
MAC_IPR_1
Port 1 MAC Interrupt Pending Register, Section 14.5.2.44
RESERVED
Reserved for Future Use
Switch Port 2 CSRs
MAC_VER_ID_2
MAC_RX_CFG_2
Port 2 MAC Version ID Register, Section 14.5.2.1
Port 2 MAC Receive Configuration Register, Section 14.5.2.2
SMSC LAN9311/LAN9311i
313
DATASHEET
Revision 2.0 (02-14-13)