LAN9311 Datasheet, PDF (146/461 Pages) SMSC Corporation – Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
Table 10.5 Microwire Command Set for 9 Address Bits (continued)
INST
START
BIT OPCODE
ADDRESS
DATA TO DATA FROM
# OF
EEPROM EEPROM CLOCKS
EWDS
1
EWEN
1
READ
1
WRITE
1
WRAL
1
00
00XXXXXXX
-
Hi-Z
12
00
11XXXXXXX
-
Hi-Z
12
10
A8 A7 A6 A5 A4 A3 A2 A1 A0
-
D7 - D0
20
01
A8 A7 A6 A5 A4 A3 A2 A1 A0
D7 - D0 (RDY/~BSY)
20
00
01XXXXXXX
D7 - D0 (RDY/~BSY)
20
Table 10.6 Microwire Command Set for 11 Address Bits
INST
ERASE
ERAL
EWDS
EWEN
READ
WRITE
WRAL
START
BIT OPCODE
ADDRESS
DATA TO
EEPROM
1
11
A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
-
1
00
10XXXXXXXXX
-
1
00
00XXXXXXXXX
-
1
00
11XXXXXXXXX
-
1
10
A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
-
1
01
A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D7 - D0
1
00
01XXXXXXXXX
D7 - D0
DATA FROM
EEPROM
(RDY/~BSY)
(RDY/~BSY)
Hi-Z
Hi-Z
D7 - D0
(RDY/~BSY)
(RDY/~BSY)
# OF
CLOCKS
14
14
14
14
22
22
22
10.2.3.2
ERASE (Erase Location)
If erase/write operations are enabled in the EEPROM, this command will erase the location selected
by the EPC_ADDRESS field of the EEPROM Command Register (E2P_CMD). The EPC_TIMEOUT
bit is set if the EEPROM does not respond within 30mS.
EECS
EECLK
EEDO
EEDI
1
1
1
Ax
A0
Figure 10.7 EEPROM ERASE Cycle
Revision 2.0 (02-14-13)
146
DATASHEET
SMSC LAN9311/LAN9311i