LAN9311 Datasheet, PDF (335/461 Pages) SMSC Corporation – Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
14.5.2.12 Port x MAC Receive CRC Error Count Register (MAC_RX_CRCERR_CNT_x)
Register #:
Port0: 0419h
Port1: 0819h
Port2: 0C19h
Size:
32 bits
This register provides a counter of received packets that with CRC errors. The counter is cleared upon
being read.
BITS
31:0
DESCRIPTION
RX CRC
Count of packets that have between 64 and the maximum allowable number
of bytes and have a bad FCS, but do not have an extra nibble. The max
number of bytes is 1518 for untagged packets and 1522 for tagged packets.
If Jumbo2K (bit 3) is set in the Port x MAC Receive Configuration Register
(MAC_RX_CFG_x), the max number of bytes is 2048.
Note: This counter will stop at its maximum value of FFFF_FFFFh.
Minimum rollover time at 100Mbps is approximately 137 hours.
TYPE
RC
DEFAULT
00000000h
SMSC LAN9311/LAN9311i
335
DATASHEET
Revision 2.0 (02-14-13)