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LAN9311 Datasheet, PDF (225/461 Pages) SMSC Corporation – Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
BITS
13
12
11
10
9
8
7
6
DESCRIPTION
Alternate MAC Address 1 Enable Port 0(Host MAC)
(MAC_ALT1_EN_MII)
This bit enables/disables the alternate MAC address 1 on Port 0.
0: Disables alternate MAC address on Port 0
1: Enables MAC address 01:00:5E:00:01:82 as a PTP address on Port 0
Alternate MAC Address 2 Enable Port 0(Host MAC)
(MAC_ALT2_EN_MII)
This bit enables/disables the alternate MAC address 2 on Port 0.
0: Disables alternate MAC address on Port 0
1: Enables MAC address 01:00:5E:00:01:83 as a PTP address on Port 0
Alternate MAC Address 3 Enable Port 0(Host MAC)
(MAC_ALT3_EN_MII)
This bit enables/disables the alternate MAC address 3 on Port 0.
0: Disables alternate MAC address on Port 0
1: Enables MAC address 01:00:5E:00:01:84 as a PTP address on Port 0
User Defined MAC Address Enable Port 0(Host MAC)
(MAC_USER_EN_MII)
This bit enables/disables the auxiliary MAC address on Port 0. The auxiliary
address is defined via the 1588_AUX_MAC_HI and 1588_AUX_MAC_LO
registers.
0: Disables auxiliary MAC address on Port 0
1: Enables auxiliary MAC address as a PTP address on Port 0
Lock Enable RX Port 0(Host MAC) (LOCK_RX_MII)
This bit enables/disables the RX lock. This lock prevents a 1588 capture
from overwriting the Clock, UUDI and Sequence ID values if the 1588 RX
interrupt for Port 0 is ready set due to a previous capture.
0: Disables RX Port 0 Lock
1: Enables RX Port 0 Lock
Note: For Port 0, receive is defined as data from the switch fabric, while
transmit is to the switch fabric.
Lock Enable TX Port 0(Host MAC) (LOCK_TX_MII)
This bit enables/disables the TX lock. This lock prevents a 1588 capture
from overwriting the Clock, UUDI and Sequence ID values if the 1588 TX
interrupt for Port 0 is ready set due to a previous capture.
0: Disables TX Port 0 Lock
1: Enables TX Port 0 Lock
Note: For Port 0, receive is defined as data from the switch fabric, while
transmit is to the switch fabric.
RESERVED
Lock Enable GPIO 9 (LOCK_GPIO_9)
This bit enables/disables the GPIO 9 lock. This lock prevents a 1588 capture
from overwriting the Clock value if the 1588_GPIO9 interrupt in the 1588
Interrupt Status and Enable Register (1588_INT_STS_EN) is already set
due to a previous capture.
0: Disables GPIO 9 Lock
1: Enables GPIO 9 Lock
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
RO
R/W
DEFAULT
0b
0b
0b
0b
1b
1b
-
1b
SMSC LAN9311/LAN9311i
225
DATASHEET
Revision 2.0 (02-14-13)