LAN9311 Datasheet, PDF (416/461 Pages) SMSC Corporation – Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
14.5.4.4 Buffer Manager Flow Control Resume Level Register (BM_FC_RESUME_LVL)
Register #:
1C03h
Size:
32 bits
This register configures the buffer usage level when a Pause frame with a pause value of 1 is sent.
BITS
DESCRIPTION
31:16
15:8
7:0
RESERVED
Resume Level Low
These bits specify the buffer usage level during times when 2 or 3 ports are
active.
Each buffer is 128 bytes.
Note: A port is “active” when 36 buffers are in use for that port.
Resume Level High
These bits specify the buffer usage level during times when 0 or 1 ports are
active.
Each buffer is 128 bytes.
Note: A port is “active” when 36 buffers are in use for that port.
TYPE
RO
R/W
R/W
DEFAULT
-
03h
07h
Revision 2.0 (02-14-13)
416
DATASHEET
SMSC LAN9311/LAN9311i