LAN9311 Datasheet, PDF (33/461 Pages) SMSC Corporation – Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
Table 3.6 Dedicated Configuration Strap Pins
BUFFER
PIN
NAME
SYMBOL
TYPE
DESCRIPTION
LED Enable
LED_EN
IS
LED Enable Strap: Configures the default value
Strap
(PU) ^{for the LED_EN bits in the LED Configuration}
67
Register (LED_CFG). When latched low, all 8
LED/GPIO pins are configured as GPIOs. When
latched high, all 8 LED/GPIO pins are configured
as LEDs. See Note 3.6.
PHY Address
Strap
PHY_ADDR_SEL
IS
(PU)
PHY Address Select Strap: Configures the default
MII management address values for the PHYs
(Virtual, Port 1, and Port 2) as detailed in Section
7.1.1, "PHY Addressing," on page 82.
68
0
0
1
2
1
1
2
3
See Note 3.6.
Port 1 Auto- AUTO_MDIX_1
IS
Port 1 Auto-MDIX Enable Strap: Configures the
MDIX Enable
(PU) ^{Auto-MDIX functionality on Port 1. When latched}
69
Strap
low, Auto-MDIX is disabled. When latched high,
Auto-MDIX is enabled.
See Note 3.6.
Port 2 Auto- AUTO_MDIX_2
IS
Port 2 Auto-MDIX Enable Strap: Configures the
MDIX Enable
(PU) ^{Auto-MDIX functionality on Port 2. When latched}
70
Strap
low, Auto-MDIX is disabled. When latched high,
Auto-MDIX is enabled.
See Note 3.6.
Note: For more information on configuration straps, refer to Section 4.2.4, "Configuration Straps," on
page 40. Additional strap pins, which share functionality with the EEPROM pins, are described
in Table 3.5.
Note 3.6
Configuration strap values are latched on power-on reset or nRST de-assertion.
Configuration strap pins are identified by an underlined symbol name. Some configuration
straps can be overridden by values from the EEPROM Loader. Refer to Section 4.2.4,
"Configuration Straps," on page 40 for more information.
SMSC LAN9311/LAN9311i
33
DATASHEET
Revision 2.0 (02-14-13)