LAN9311 Datasheet, PDF (252/461 Pages) SMSC Corporation – Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
14.2.8.4 Virtual PHY Identification LSB Register (VPHY_ID_LSB)
Offset:
1CCh
Index (decimal): 3
Size:
32 bits
This read/write register contains the LSB of the Virtual PHY Organizationally Unique Identifier (OUI).
The MSB of the Virtual PHY OUI is contained in the Virtual PHY Identification MSB Register
(VPHY_ID_MSB).
BITS
DESCRIPTION
31:16
15:10
9:4
RESERVED
(See Note 14.25)
PHY ID
This field contains the lower 6-bits of the Virtual PHY OUI (Note 14.26).
Model Number
This field contains the 6-bit manufacturer’s model number of the Virtual PHY
(Note 14.26).
3:0 Revision Number
This field contain the 4-bit manufacturer’s revision number of the Virtual PHY
(Note 14.26).
TYPE
RO
R/W
R/W
R/W
DEFAULT
-
000000b
000000b
0000b
Note 14.25 The reserved bits 31-16 are used to pad the register to 32-bits so that each register is on
a DWORD boundary. When accessed serially (through the MII management protocol), the
register is 16-bits wide.
Note 14.26 IEEE allows a value of zero in each of the 32-bits of the PHY Identifier.
Revision 2.0 (02-14-13)
252
DATASHEET
SMSC LAN9311/LAN9311i