LAN9311 Datasheet, PDF (217/461 Pages) SMSC Corporation – Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
14.2.5.16 1588 Clock Target High-DWORD Register (1588_CLOCK_TARGET_HI)
Offset:
17Ch
Size:
32 bits
T h i s r e a d / w r i t e r e g i s t e r c o m b i n e d w i t h 1 5 8 8 C l o c k Ta r g e t L o w - D W O R D R e g i s t e r
(1588_CLOCK_TARGET_LO) form the 64-bit 1588 Clock Target value. The 1588 Clock Target value
is compared to the current 1588 Clock value and can be used to trigger an interrupt upon at match.
Refer to Chapter 11, "IEEE 1588 Hardware Time Stamp Unit," on page 155 for additional information.
BITS
31:0
DESCRIPTION
Clock Target High (CLOCK_TARGET_HI)
This field contains the high 32-bits of the 64-bit 1588 Clock Compare value.
TYPE
R/W
DEFAULT
00000000h
Note: Both this register and the 1588 Clock Target Low-DWORD Register
(1588_CLOCK_TARGET_LO) must be written for either to be affected.
SMSC LAN9311/LAN9311i
217
DATASHEET
Revision 2.0 (02-14-13)