LAN9311 Datasheet, PDF (206/461 Pages) SMSC Corporation – Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
14.2.5.5
Port x 1588 Clock High-DWORD Transmit Capture Register (1588_CLOCK_HI_TX_CAPTURE_x)
Offset:
Port 1: 110h
Port 2: 130h
Port 0: 150h
Size:
32 bits
BITS
31:0
DESCRIPTION
Timestamp High (TS_HI)
This field contains the high 32-bits of the timestamp taken on the
transmission of a 1588 Sync or Delay_Req packet.
TYPE
RO
DEFAULT
00000000h
Note: The selection between Sync or Delay_Req packets is based on the corresponding
master/slave bit in the 1588 Configuration Register (1588_CONFIG).
Note: There are multiple instantiations of this register, one for each port of the LAN9311/LAN9311i.
Refer to Section 14.2.5 for additional information.
Note: For Port 0(Host MAC), receive is defined as data from the switch fabric, while transmit is to
the switch fabric.
Revision 2.0 (02-14-13)
206
DATASHEET
SMSC LAN9311/LAN9311i