LAN9311 Datasheet, PDF (139/461 Pages) SMSC Corporation – Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

10.2.1
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
EEPROM Controller Operation
I²C and Microwire master EEPROM operations are performed using the EEPROM Command Register
(E2P_CMD) and EEPROM Data Register (E2P_DATA).
In Microwire EEPROM mode, the following operations are supported:
 ERASE (Erase Location)
 ERAL (Erase All)
 EWDS (Erase/Write Disable)
 EWEN (Erase/Write Enable)
 READ (Read Location)
 WRITE (Write Location)
 WRAL (Write All)
 RELOAD (EEPROM Loader Reload - See Section 10.2.4, "EEPROM Loader")
Note: In I²C EEPROM mode, only a sub-set of the above commands (READ, WRITE, and RELOAD)
are supported.
Note: The EEPROM Loader uses the READ command only.
The supported commands of each mode are detailed in Section 14.2.4.1, "EEPROM Command
Register (E2P_CMD)," on page 198. Details specific to each EEPROM controller mode (I²C and
Microwire) are explained in Section 10.2.2, "I2C EEPROM" and Section 10.2.3, "Microwire EEPROM"
respectively.
When issuing a WRITE, or WRAL command, the desired data must first be written into the EEPROM
Data Register (E2P_DATA). The WRITE or WRAL command may then be issued by setting the
EPC_COMMAND field of the EEPROM Command Register (E2P_CMD) to the desired command
value. If the operation is a WRITE, the EPC_ADDRESS field in the EEPROM Command Register
(E2P_CMD) must also be set to the desired location. The command is executed when the EPC_BUSY
bit of the EEPROM Command Register (E2P_CMD) is set. The completion of the operation is indicated
when the EPC_BUSY bit is cleared.
When issuing a READ command, the EPC_COMMAND and EPC_ADDRESS fields of the EEPROM
Command Register (E2P_CMD) must be configured with the desired command value and the read
address, respectively. The READ command is executed by setting the EPC_BUSY bit of the EEPROM
Command Register (E2P_CMD). The completion of the operation is indicated when the EPC_BUSY
bit is cleared, at which time the data from the EEPROM may be read from the EEPROM Data Register
(E2P_DATA).
Other EEPROM operations (EWDS, EWEN, ERASE, ERAL, RELOAD) are performed by writing the
appropriate command into the EPC_COMMAND field of the EEPROM Command Register
(E2P_CMD). The command is executed by setting the EPC_BUSY bit of the EEPROM Command
Register (E2P_CMD). In all cases, the software must wait for the EPC_BUSY bit to clear before
modifying the EEPROM Command Register (E2P_CMD).
Note: The EEPROM device powers-up in the erase/write disabled state. To modify the contents of
the EEPROM, the EWEN command must first be issued.
If an operation is attempted and the EEPROM device does not respond within 30mS, the
LAN9311/LAN9311i will time-out, and the EPC_TIMEOUT bit of the EEPROM Command Register
(E2P_CMD) will be set.
SMSC LAN9311/LAN9311i
139
DATASHEET
Revision 2.0 (02-14-13)