LAN9311 Datasheet, PDF (428/461 Pages) SMSC Corporation – Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
14.5.4.15 Buffer Manager Port 0 Egress Rate Priority Queue 2/3 Register (BM_EGRSS_RATE_02_03)
Register #:
1C0Eh
Size:
32 bits
This register, along with the Buffer Manager Configuration Register (BM_CFG), is used to configure
the egress rate pacing.
BITS
DESCRIPTION
31:26
25:13
RESERVED
Egress Rate Port 0 Priority Queue 3
These bits specify the egress data rate for the Port 0(Host MAC) priority
queue 3. The rate is specified in time per byte. The time is this value plus
1 times 20nS.
12:0 Egress Rate Port 0 Priority Queue 2
These bits specify the egress data rate for the Port 0(Host MAC) priority
queue 2. The rate is specified in time per byte. The time is this value plus
1 times 20nS.
TYPE
RO
R/W
R/W
DEFAULT
-
00000h
00000h
Revision 2.0 (02-14-13)
428
DATASHEET
SMSC LAN9311/LAN9311i