LAN9311 Datasheet, PDF (444/461 Pages) SMSC Corporation – Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
15.4 DC Specifications
Table 15.3 I/O Buffer Characteristics
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
IS Type Input Buffer
Low Input Level
High Input Level
Negative-Going Threshold
Positive-Going Threshold
SchmittTrigger Hysteresis
(V_IHT - V_ILT)
Input Leakage
Input Capacitance
O8 Type Buffers
V_ILI
V_IHI
V_ILT
V_IHT
V_HYS
I_IN
C_IN
-0.3
3.6
1.01
1.18
1.35
1.39
1.6
1.8
345
420
485
-10
10
3
V
V
V
Schmitt trigger
V
Schmitt trigger
mV
uA
Note 15.6
pF
Low Output Level
High Output Level
OD8 Type Buffer
V_OL
V_OH
VDD33IO - 0.4
0.4
V
I_OL = 8mA
V
I_OH = -8mA
Low Output Level
V_OL
O12 Type Buffer
0.4
V
I_OL = 8mA
Low Output Level
High Output Level
OD12 Type Buffer
V_OL
V_OH
VDD33IO - 0.4
0.4
V
I_OL = 12mA
V
I_OH = -12mA
Low Output Level
V_OL
ICLK Type Buffer (XI Input)
0.4
V
I_OL = 12mA
Note 15.7
Low Input Level
High Input Level
V_ILI
-0.3
V_IHI
1.4
0.5
V
3.6
V
Note 15.6 This specification applies to all IS type inputs and tri-stated bi-directional pins. Internal pull-
down and pull-up resistors add +/- 50uA per-pin (typical).
Note 15.7 XI can optionally be driven from a 25MHz single-ended clock oscillator.
Table 15.4 100BASE-TX Transceiver Characteristics
PARAMETER
Peak Differential Output Voltage High
Peak Differential Output Voltage Low
Signal Amplitude Symmetry
Signal Rise and Fall Time
Rise and Fall Symmetry
Duty Cycle Distortion
SYMBOL
V_PPH
V_PPL
V_SS
T_RF
T_RFS
D_CD
MIN
950
-950
98
3.0
-
35
TYP
MAX UNITS NOTES
-
1050 mVpk Note 15.8
-
-1050 mVpk Note 15.8
-
102
%
Note 15.8
-
5.0
nS
Note 15.8
-
0.5
nS
Note 15.8
50
65
%
Note 15.9
Revision 2.0 (02-14-13)
444
DATASHEET
SMSC LAN9311/LAN9311i