LAN9311 Datasheet, PDF (35/461 Pages) SMSC Corporation – Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
Table 3.8 PLL Pins
BUFFER
PIN
NAME
SYMBOL
TYPE
DESCRIPTION
PLL +1.8V
VDD18PLL
Power Supply
107
P
PLL +1.8V Power Supply: This pin must be
connected to VDD18CORE for proper operation.
Refer to the LAN9311/LAN9311i reference
schematic for additional connection information.
Crystal Input
XI
105
ICLK
Crystal Input: External 25MHz crystal input. This
signal can also be driven by a single-ended clock
oscillator. When this method is used, XO should be
left unconnected.
106
Crystal
Output
XO
OCLK Crystal Output: External 25MHz crystal output.
Table 3.9 Core and I/O Power and Ground Pins
BUFFER
PIN
NAME
SYMBOL
TYPE
DESCRIPTION
7,13,21,27,
33,39,46,
54,64,66,
72,73,81,
87,93,100
3,14,40,65,
74,88,104
+3.3V I/O
Power
Digital Core
+1.8V Power
Supply
Output
VDD33IO
VDD18CORE
P
+3.3V Power Supply for I/O Pins and Internal
Regulator
Refer to the LAN9311/LAN9311i reference
schematic for additional connection information.
P
Digital Core +1.8V Power Supply Output: +1.8V
power from the internal core voltage regulator. All
VDD18CORE pins must be tied together for proper
operation.
Refer to the LAN9311/LAN9311i reference
schematic for additional connection information.
18,48,80,
97,112,113,
128
Note 3.8
Common
Ground
VSS
P
Common Ground
Note 3.8 Plus external pad for 128-XVTQFP package only
Table 3.10 No-Connect Pins
PIN
1,2, 4-6,
8-12,
15-17,19,
20,22-24,
76,94,95,
102,103,
109
NAME
No Connect
SYMBOL
NC
BUFFER
TYPE
DESCRIPTION
-
No Connect: These pins must be left floating for
normal device operation.
SMSC LAN9311/LAN9311i
35
DATASHEET
Revision 2.0 (02-14-13)