LAN9311 Datasheet, PDF (244/461 Pages) SMSC Corporation – Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
14.2.7 PHY Management Interface (PMI)
The PMI registers are used (by the EEPROM Loader only) to indirectly access the PHY registers.
Refer to Section 14.4, "Ethernet PHY Control and Status Registers," on page 287 for additional
information on the PHY registers.
Note: These registers are only accessible by the EEPROM Loader and NOT by the Host bus. Refer
to Section 10.2.4, "EEPROM Loader," on page 150 for additional information.
14.2.7.1 PHY Management Interface Data Register (PMI_DATA)
Offset:
0A4h
Size:
EEPROM Loader
Access Only
32 bits
This register is used in conjunction with the PHY Management Interface Access Register
(PMI_ACCESS) to perform write operations to the PHYs.
Note: This register is only accessible by the EEPROM Loader and NOT by the Host bus. Refer to
Section 10.2.4, "EEPROM Loader," on page 150 for additional information.
BITS
DESCRIPTION
31:16 RESERVED
15:0 MII Data
This field contains the value written to the PHYs. For a write operation, this
register should be first written with the desired data.
TYPE
RO
WO
DEFAULT
-
00000000h
Revision 2.0 (02-14-13)
244
DATASHEET
SMSC LAN9311/LAN9311i