8101 Datasheet, PDF (80/172 Pages) LSI Computer Systems – Gigabit Ethernet Controller

Figure 3.1 8101/8104 Interface Diagram
System
Interface
SCLK
TXENn
TXD[31:0]
TXBE[3:0]
TXSOF
TXEOF
TXWM1n
TXWM2n
TXDC
CLR_TXDC
FCNTRL
TXCRCn
RXENn
RXOEn
RXD[31:0]
RXBE[3:0]
RXSOF
RXEOF
RXWM1
RXWM2
RXDC
CLR_RXDC
RXABORT
TBC
TX[9:0]]
RBC[1:0]
RX[9:0]
EN_CDET
EWRAP
LCK_REFn
REGCSn
REGCLK
REGD[15:0]
REGA[7:0]
REGRDn
REGWRn
REGINT
TCLK
LINKn
SD
RESETn
TAP
TEST
VCC
GND[30:0]
10-Bit PHY
Interface
Register
Interface
Miscellaneous
3.3 V ± 5%
Ground
3-2
Signal Descriptions
Copyright © 2000–2001 by LSI Logic Corporation. All rights reserved.