8101 Datasheet, PDF (37/172 Pages) LSI Computer Systems – Gigabit Ethernet Controller

4. If the bit selected in (3) is a "one" the destination address passes the
filter; otherwise, the address fails the filter and the packet is rejected
and discarded.
Note: If all 64 bits of the address filter are programmed to all
ones, the address filter passes all multicast addresses.
Table 2.5 Multicast Address Filter Map
FCS Bits
[0:2]¹
Address
Filter Byte²
FCS Bits
[3:5]¹
Address
Filter Bit³
000
F0[7:0]
000
Fx[0]
001
F1[7:0]
001
Fx[1]
010
F2[7:0]
010
Fx[2]
011
F3[7:0]
011
Fx[3]
100
F4[7:0]
100
Fx[4]
101
F5[7:0]
101
Fx[5]
110
F6[7:0]
110
Fx[6]
111
F7[7:0]
111
Fx[7]
1. Bits 0−5 are the six least-significant bits of the CRC.
2. F[7:0] are bytes in Address Filter 1−4 Registers.
3. Fx[7:0] are bits within each byte in Address Filter 1−4 Registers.
Setting the REJMCST bit in “Register 8–Configuration 2‚" Section 4.3.9,
programs the controller to reject all multicast packets regardless of their
address. When this bit is set all multicast packets are rejected regardless
of their address.
Multicast packet address filtering functions do not affect the reception of
MAC control frames. Other bits described in Section 2.17, “MAC Control
Frames,” control the reception of MAC control frames.
2.8.5 Broadcast Address Filter
The controller does not do any filtering on broadcast packets. To program
the controller to reject all broadcast packets, set the REJBCST bit in
“Register 8–Configuration 2‚" Section 4.3.9. When this bit is set all
broadcast packets are rejected regardless of their address.
Receive MAC
Copyright © 2000–2001 by LSI Logic Corporation. All rights reserved.
2-19