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8101 Datasheet, PDF (34/172 Pages) LSI Computer Systems – Gigabit Ethernet Controller | |||
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Table 2.3 TXRC Bit and TXCRCn Pin Logic
TXCRC Bit1
1
1
0
0
TXCRCn2 Pin CRC Appended to End of Packet?
1
Yes
0
Yes
1
No
0
Yes
1. 1 = Append, 0 = No append
2. 1 = No append, 0 = Append
2.7.4 Interpacket Gap
If packets from the transmit FIFO arrive at the transmit MAC sooner than
the minimum IPG time the transmit MAC adds enough time between
packets to equal the minimum IPG value. The default IPG time is set to
96 bits (1 bit = 1 ns).To program other values, set the transmit IPG select
bits IPG[2:0] in âRegister 7âConï¬guration 1â" Section 4.3.8, as
summarized in Table 2.4.
Table 2.4 Transmit IPG Selection
IPG[2:0]
Bits
111
110
101
100
011
010
001
000
IPG Value
(ns)
96
112
80
64
192
384
768
32
Comments
IEEE minimum speciï¬cation
2 à IEEE minimum speciï¬cation
4 à IEEE minimum speciï¬cation
8 à IEEE minimum speciï¬cation
2-16
Functional Description
Copyright © 2000â2001 by LSI Logic Corporation. All rights reserved.
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