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8101 Datasheet, PDF (26/172 Pages) LSI Computer Systems – Gigabit Ethernet Controller | |||
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Table 2.1 Length/Type Field Deï¬nition
Length/Type
Field Value
(Decimal)
0â1500
1501â1517
⥠1518
Length
or Type
Length
Neither
Type
Deï¬nition
Total number of bytes in data ï¬eld
minus any padding
Undeï¬ned
Frame type
2.5.5 Data
The data is a 46â1500 byte ï¬eld containing the actual data to be
transmitted between two stations. If the actual data is less than 46 bytes,
extra zeros are added to increase the data ï¬eld to the 46 byte minimum
size. Adding these extra zeros is referred to as padding.
2.5.6 Frame Check Sequence (FCS)
The FCS is a 32-bit cyclic redundancy check (CRC) value computed on
the entire frame, exclusive of preamble and SFD. The FCS algorithm is
deï¬ned in IEEE 802.3. The FCS is appended to the end of the frame and
determines frame validity.
2.5.7 Interpacket Gap (IPG)
The IPG is the time interval between packets. The minimum IPG value
is 96 bits, where 1 bit = 1 ns for Gigabit Ethernet. There is no maximum
IPG limit.
2.6 System Interface
The system interface is a 64-bit wide data interface consisting of
separate 32-bit data busses for transmit and receive.
2.6.1 Data Format and Bit Order
The format of the data word on TXD[31:0] and RXD[31:0] and its
relationship to the MAC frame format and 10-bit PHY interface format is
2-8
Functional Description
Copyright © 2000â2001 by LSI Logic Corporation. All rights reserved.
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