8101 Datasheet, PDF (103/172 Pages) LSI Computer Systems – Gigabit Ethernet Controller

4.3.8 Register 7–Configuration 1
15
RST
14
RXRST
13
TXRST
12
ANRST
11
CTRRST
10
APAD
9
8
IPG[2:1]
7
IPG[0]
6
TXPRMBL
5
TXCRC
4
RXPRMBL
3
RXCRC
2
1
STSWRD1 STSWRD0
0
PEOF
Note: RST 15-bit occurs on the REGD15 pin
RST
Reset
RST
1
0
15, R/WSC
Description
Controller is reset; it self-clears in 1 µs
Nominal operation
RXRST
Receive Reset
14, R/WSC
RXRST Description
1
Receive data path reset, self-clears when the start
of the new packet is detected
0
Normal
TXRST
Transmit Reset
13, R/WSC
TXRST
1
0
Description
Transmit data, data reset, self-clearing in 1 µs
Normal
ANRST
AutoNegotiation Restart
12, R/WSC
ANRST Description
1
AutoNegotiation algorithm restarted, self-clearing
after AutoNegotiation process starts
0
No Reset
CTRRST
Counter Reset
11, R/WSC
CTRRST
1
0
Description
All counters reset to 0, self-clearing in 1 µs
No reset
Register Definitions
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4-15