8101 Datasheet, PDF (108/172 Pages) LSI Computer Systems – Gigabit Ethernet Controller

4-20
RES
Reserved
[15:14], R/W
Must be left at default value or written to 0 for proper
operation.
AUTOCLR
AutoClear Mode Enable
13, R/W
AUTOCLR Description
1
TXDC and RXDC automatically cleared at next
EOF
0
TXDC and RXDC cleared by CLR_TXDC and
CLR_RXDC pins, respectively
AUTORXAB
AutoAbort Enable
12, R/W
AUTORXAB Description
1
Current packet aborted and RXDC automatically
cleared at next EOF
0
No Abort
CTR_RD
Counter Reset On Read Enable
11, R/W
CTR_RD Description
1
Counters reset to 0 when read
0
Counters not reset when read (only if count <
maximum count)
CTR_ROLL
Counter Rollover Enable
10, R/W
CTR_ROLL Description
1
Counters rollover to 0 after maximum count
0
Counters stop at maximum count
EWRAP
EWRAP Pin Assert
9, R/W
EWRAP
Description
1
EWRAP pin is asserted active HIGH
0
Deassert
LCKREF
LCKREFn Pin Assert
LCKREF
Description
1
LCKREFn pin is asserted
0
Deassert
8, R/W
Registers
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