8101 Datasheet, PDF (65/172 Pages) LSI Computer Systems – Gigabit Ethernet Controller

Table 2.13 Reset Description
Name
Initiated By
Reset Action
Controller
Reset
RESETn pin
asserted LOW
Reset datapath
Flush transmit FIFO
RST bit = 1 in Register 7
(Configuration i)
Flush receive FIFO
Reset bits to default values
Reset counters to 0
Transmit
Reset
TXRST bit = 1 in Register 7
(Configuration 1)
Reset transmit data path
Flush transmit FIFO
Reset TX counters to 0
Receive
Reset
RXRST bit = 1 in Register 7 Reset receive data
(Configuration 1)
separate path
Flush receive FIFO
Reset RX counters to 0
AutoNegotiation ANRST bit = 1 in Register 7 Starts AutoNegotiation
Restart
(Configuration 1)
sequence
Counter Reset CTRRST bit = 1 in Register 7 Reset counters to 0
(Configuration 1)
2.19 Counters
The controller has a set of 53 management counters. Each counter
tabulates the number of times a specific event occurs. A complete list of
all counters along with their definitions is shown in Table 2.14. and
described in Chapter 4, Registers.These counters provide the necessary
statistics to completely support the following specifications:
• RMON Statistics Group (IETF RFC1757)
• SNMP Interfaces Group (IETF RFC1213 and 1573)
• Ethernet-Like MIB (IETF RFC1643)
• Ethernet MIB (IEEE 802.3z, clause 30)
Counters
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