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MC68HC05PV8 Datasheet, PDF (92/196 Pages) Freescale Semiconductor, Inc – Techinal Data - rev 1.9
Technical Data
Freescale Semiconductor, Inc.
During WAIT mode the I bit in the CCR is cleared to enable interrupts.
All other registers, memory and input/output lines remain in their
previous state. The core timer may be enabled to allow a periodic exit
from the WAIT mode.
WAIT mode consumes more power than STOP mode.
Technical Data
MC68HC(8)05PV8/A — Rev. 1.9
Operating Modes
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