MC68HC05PV8 Datasheet, PDF (135/196 Pages) Freescale Semiconductor, Inc – Techinal Data - rev 1.9

Freescale Semiconductor, Inc.
16-Bit Programmable Timer
Registers
SI1 – Sample Input 1
1 = Bit set when input capture 1 input is sampled high while output
compare register 1 matches the free running counter
0 = Bit cleared when input capture 1 input is sampled low while
output compare register 1 matches the free running counter
SI2 – Sample Input 2
1 = Bit set when input capture 2 input is sampled high while output
compare register 2 matches the free running counter
0 = Bit cleared when input capture 2 input is sampled low while
output compare register 2 matches the free running counter
Accessing the timer status registers satisfies the first condition required
to clear status bits. The remaining step is to access the registers
corresponding to the status bit.
A problem can occur when using the timer overflow function and reading
the free-running counter at random times to measure an elapsed time.
Without incorporating the proper precautions into software, the timer
overflow flag could unintentionally be cleared if:
1. The timer status register is read or written when TOF is set, and
2. The LSB of the free-running counter is read but not for the purpose
of servicing the flag
The counter alternate register contains the same value as the
free-running counter; therefore this alternate register can be read at any
time without affecting the timer overflow flag in the timer status register.
MC68HC(8)05PV8/A — Rev. 1.9
16-Bit Programmable Timer
For More Information On This Product,
Go to: www.freescale.com
Technical Data