MC68HC05PV8 Datasheet, PDF (171/196 Pages) Freescale Semiconductor, Inc – Techinal Data - rev 1.9

Freescale Semiconductor, Inc.
Fast Parallel Interface
Description
15.3.1 System Control Register
The following paragraphs describe the FPIE and FPICLK bit function of
the system control register.
$000A
Read:
Write:
Reset:
Bit 7
6
5
4
3
2
1
WCP
POR INTP INTN INTE WCOP
FPIE
U
0
0
1
0
0
0
Figure 15-2 System Control Register (SYSCR)
Bit 0
FPICLK
0
FPIE – Fast Peripheral Interface Enable
If this bit is set the fast peripheral interface is enabled. PA0–3 and
PB0–3 are no longer available as I/Os.
1 = Fast peripheral interface enabled
0 = Fast peripheral interface disabled
FPICLK – Fast Peripheral Clock
If this bit is set, the FPI clocks are free running
1 = AS and DEN only become active when CPU accesses
$0030–$003F
0 = AS and DEN always active
MC68HC(8)05PV8/A — Rev. 1.9
Fast Parallel Interface
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Technical Data