MC68HC05PV8 Datasheet, PDF (32/196 Pages) Freescale Semiconductor, Inc – Techinal Data - rev 1.9

Technical Data
Freescale Semiconductor, Inc.
1.7.5 IRQ
The interrupt triggering sensitivity of this pin can be programmed as
rising/falling edge sensitive or high/low level sensitive.The IRQ pin
contains an internal Schmitt trigger as part of its input to improve noise
immunity. See Section 4. Interrupts for more details on the interrupts.
1.7.6 PA0–PA7/VREFH, VREFL, AN1–6, IN, IIN, OUT
These eight I/O lines comprise port A. The state of any pin is software
programmable and all port A lines are configured as inputs during
power-on or reset. The eight I/O lines are shared with the A/D converter
function (see Section 10. Analog to Digital Converter). The internal
operational amplifier is connected to PA4/OUT (output), PA5/IIN
(inverting input) and PA6/IN (input) (see 7.4.6 Operational Amplifier).
See Section 7. Input/Output Ports for more details on the I/O ports.
1.7.7 PB0–PB4/TCMP1, TCMP2, TCAP1, TCAP2, PWM
These five I/O lines comprise port B. The state of any pin is software
programmable and all port B lines are configured as inputs during
power-on or reset. The port pins PB0–PB3 are shared with the 16-bit
timer (TCAP1–2, TCMP1–2). See Section 9. 16-Bit Programmable
Timer for more details on the operation of the 16-bit timer. Pin PB4 is
shared with the PWM system (see Section 11. Pulse Width
Modulator).
See Section 7. Input/Output Ports for more details on the I/O ports.
Technical Data
MC68HC(8)05PV8/A — Rev. 1.9
General Description
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