MC68HC05PV8 Datasheet, PDF (167/196 Pages) Freescale Semiconductor, Inc – Techinal Data - rev 1.9

Freescale Semiconductor, Inc.
Program EEPROM
Options Register
CME – Clock Monitor Enable
The CME bit enables a watchdog for the oscillator circuit. When the
frequency drops below a threshold (due to a brown-out or a defective
element), when enabled, the clock monitor will reset the MCU and
switch to an internal RC oscillator.
1 = Clock monitor enabled
0 = Clock monitor disabled
STOPR – STOP Reset
When enabled, the MCU will be reset when a STOP instruction is to
be executed.
1 = STOP instruction causes reset
0 = STOP instruction executes normally
HTRE – High Temperature Reset Enable
The HTRE bit allows the high temperature reset to be enabled. If the
HTRE bit is in erased state (logic 0), the HTR is disabled.
Programming this bit (logic 1) enables the HTR. Changes to this bit
do not take effect until the next power-on or external reset occurs. See
Section 5. Resets for details.
1 = HTR enabled
0 = HTR disabled
HVRE – High Voltage Reset Enable
The HVRE bit allows the high voltage reset to be enabled. If the HVRE
bit is in erased state (logic 0), the HVR is disabled. Programming this
bit (logic 1) enables the HVR. Changes to this bit do not take effect
until the next power-on or external reset occurs. See Section 5.
Resets for details.
1 = HVR enabled
0 = HVR disabled
MC68HC(8)05PV8/A — Rev. 1.9
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Technical Data