MC68HC05PV8 Datasheet, PDF (128/196 Pages) Freescale Semiconductor, Inc – Techinal Data - rev 1.9

Technical Data
Freescale Semiconductor, Inc.
Because the output compare flag OC1F and the output compare register
1 are undetermined at power-on, and are not affected by external reset,
care must be exercised when initializing the output compare function.
The following procedure is recommended.
Write the high byte to the compare register 1 to inhibit further compares
until the low byte is written.
Read the status register to arm the OC1F if it is already set.
Write the output compare register 1 low byte to enable the output
compare 1 function with the flag clear.
The purpose of this procedure is to prevent the OC1F bit from being set
between the time it is read and the write to the corresponding output
compare register.
9.3.2.2 Output Compare Register 2
The 16-bit output compare register 2 is made up of two 8-bit registers at
locations $16 (MSB) and $17 (LSB). The output compare register
contents are compared with the contents of the free-running counter
once every four internal processor clock cycles. If a match is found, the
output compare flag OC2F (bit 3 of the timer status register ($1E)) is set
and the corresponding output level OLVL2 bit is clocked to TCMP2
output.
The output compare register values and the output level bit should be
changed after each successful comparison to establish a new elapsed
time-out. An interrupt can also accompany a successful output compare
provided the corresponding interrupt enable bit (OCI2E) is set.
After a processor write cycle to the output compare register 2 containing
the MSB ($16), the output compare function is inhibited until the LSB
($17) is also written. The user must write both bytes (locations) if the
MSB is written first. A write made only to the LSB ($17) will not inhibit the
compare function. The free-running counter is updated every four
internal bus clock cycles. The minimum time required to update the
output compare register is a function of the program rather than the
internal hardware.
Technical Data
MC68HC(8)05PV8/A — Rev. 1.9
16-Bit Programmable Timer
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