MC68HC05PV8 Datasheet, PDF (45/196 Pages) Freescale Semiconductor, Inc – Techinal Data - rev 1.9

Freescale Semiconductor, Inc.
CPU and Instruction Set
CPU Registers
3.2.2 Index Register
In the indexed addressing modes, the CPU uses the byte in the index
register to determine the conditional address of the operand.
Reset:
Bit 7
6
5
4
3
2
Unaffected by reset
Figure 3-3 Index Register
1
Bit 0
The 8-bit index register can also serve as a temporary data storage
location.
3.2.3 Stack Pointer
The stack pointer is a 16-bit register that contains the address of the next
location on the stack. During a reset or after the reset stack pointer
(RSP) instruction, the stack pointer is preset to $00FF. The address in
the stack pointer decrements as data is pushed onto the stack and
increments as data is pulled from the stack.
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 Bit 0
0000000011
Reset 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Figure 3-4 Stack Pointer
The ten most significant bits of the stack pointer are permanently fixed
at 000000011, so the stack pointer produces addresses from $00C0 to
$00FF. If subroutines and interrupts use more than 64 stack locations,
the stack pointer wraps around to address $00FF and begins writing
over the previously stored data. A subroutine uses two stack locations.
An interrupt uses five locations.
MC68HC(8)05PV8/A — Rev. 1.9
CPU and Instruction Set
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Technical Data