MC68HC05PV8 Datasheet, PDF (180/196 Pages) Freescale Semiconductor, Inc – Techinal Data - rev 1.9

Technical Data
Freescale Semiconductor, Inc.
16.7 Voltage Regulator
(6V ≤ V_SUP ≤ 16V, device untrimmed, V_SS = 0Vdc, T_J = –40°C to +125°C, unless otherwise noted)
Characteristic
Symbol Min
Typ
Max
Unit
Comment
Output Voltage (6V ≤ V_SUP ≤ 16V)
V_DD
4.75
5.0
5.25
V
I_OUT ≤ 20mA
Output Voltage (9V ≤ V_SUP ≤ 16V) in
Ultra Low Power Mode
V_DD
3.7
V
only on
MC68HC05PV8A
Output Voltage
(5.5V < V_SUP ≤ 40V)
Total Output Current
Line Regulation (6V ≤ V_SUP ≤ 16V)
Load Regulation
Output Voltage Trimming Step
Low Voltage Reset Low Threshold
Low Voltage Reset Hysteresis
Low Voltage Reset Low Threshold in
Ultra Low Power Mode
V_DD
I_OUT
V_LIR
V_LOR
V_STEPTRIM
V_LVRON
V_LVRH
V_ULVRON
4.5
–
–
–
-
4.15
40
5.0
–
10
50
40
4.40
100
2.6
5.5
30
35
100
-
4.65
200
V
I_OUT ≤ 30mA
mA
See notes 1 & 2
mV
I_OUT = 1mA
mV
1mA ≤ I_OUT ≤ 20mA
mV
See chapter 12
V
See notes 3, 4
mV
& Figure 16-1
V
only on
MC68HC05PV8A
NOTES:
1. The current sourcing capability includes the current for the MCU core, for the ports and
also for any external load.
2. Refer to the maximum power dissipation.
3. The Low Voltage Reset thresholds and hysteresis are measured relative to V_DD with
VT2..VT0 cleared in the MFTEST register (POR condition, TRIM 0 configuration).
4. As the voltage regulator and the low voltage reset are using the same internal voltage ref-
erence, it is ensured that the low voltage reset will only occur when the voltage regulator
is out of regulation.
5. The stability is ensured with a decoupling capacitor between VDD and VSS: C_OUT ≥ 10µF
with ESR ≤ 10Ω. Capacitor value and type should be choosen under consideration of the
allowable VDD ripple in the particular application.
Technical Data
MC68HC(8)05PV8/A — Rev. 1.9
Electrical Specifications
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