MC68HC05PV8 Datasheet, PDF (46/196 Pages) Freescale Semiconductor, Inc – Techinal Data - rev 1.9

Technical Data
Freescale Semiconductor, Inc.
3.2.4 Program Counter
The program counter is a 16-bit register that contains the address of the
next instruction or operand to be fetched. The two most significant bits
of the program counter are ignored internally.
Normally, the address in the program counter automatically increments
to the next sequential memory location every time an instruction or
operand is fetched. Jump, branch, and interrupt operations load the
program counter with an address other than that of the next sequential
location.
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 Bit 0
––
Reset – –
Loaded with vector from $3FFE AND $3FFF
Figure 3-5 Program Counter
3.2.5 Condition Code Register
The condition code register is an 8-bit register whose three most
significant bits are permanently fixed at 111. The condition code register
contains the interrupt mask and four flags that indicate the results of the
instruction just executed. The following paragraphs describe the
functions of the condition code register.
Reset
Bit 7
1
1
6
5
4
3
2
1
1
H
I
N
1
1
U
1
U
Figure 3-6 Condition Code Register
1
Bit 0
C
Z
U
U
Half-Carry Flag
The CPU sets the half-carry flag when a carry occurs between bits 3 and
4 of the accumulator during an ADD or ADC operation. The half-carry
flag is required for binary-coded decimal (BCD) arithmetic operations.
Technical Data
MC68HC(8)05PV8/A — Rev. 1.9
CPU and Instruction Set
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