MC68HC05PV8 Datasheet, PDF (165/196 Pages) Freescale Semiconductor, Inc – Techinal Data - rev 1.9

Freescale Semiconductor, Inc.
Program EEPROM
EEPROM Protection Mechanism
controls the activation of the charge pump. The charge pump is not
affected by WAIT mode, thus it is possible to wait the t_ERA erase time
or t_PROG programming time in WAIT mode. The EEPROM is set to
read mode when entering STOP mode.
1 = EEPROM read state
0 = Activate charge pump; address and data may be latched for
EEPROM write.
PGMB – Programming enable
When cleared, this bit allows programming of the EEPROM. It can
only be cleared if the LATB is already cleared and at least one
EEPROM write has occurred. This bit must be set when changing the
address and data for programming new data. It is automatically set
when LATB is set.
1 = EEPROM programming is inhibited
0 = EEPROM programming is enabled
14.4 EEPROM Protection Mechanism
In order to achieve a higher degree of protection, inadvertent
programming of the EEPROM can be avoided by use of the EEPRT bit
of the options register. As long as this bit is not active (= 0), the whole
array, except the first 4 bytes, can be erased or programmed. As soon
as the EEPRT bit is active (= 1), the EEPROM is protected and becomes
a read-only memory in single chip mode. Note that programming cannot
be done by software executed from this EEPROM array!
Any attempt to erase or program a location in single-chip mode will then
be unsuccessful. Then the EEPROM can be programmed only in
bootloader mode. If the EEPRT bit is then cleared (not protected), the
EEPROM will stay protected until the next power-on or external reset.
MC68HC(8)05PV8/A — Rev. 1.9
Program EEPROM
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Technical Data