MC68HC05PV8 Datasheet, PDF (136/196 Pages) Freescale Semiconductor, Inc – Techinal Data - rev 1.9

Technical Data
Freescale Semiconductor, Inc.
9.4 Timer During WAIT Mode
The CPU clock halts during WAIT mode but the timer keeps on running.
If any reset is used to exit WAIT mode the counters are forced to $FFFC.
If interrupts are enabled a timer interrupt will cause the processor to exit
WAIT mode.
9.5 Timer During STOP Mode
In STOP mode the timer stops counting and holds the last count value if
STOP is exited by an interrupt. If any reset is used the counters are
forced to $FFFC.
Note: During STOP, if at least one valid input capture edge occurs at the
TCAP pins, the input capture detect circuit is armed. This does not set
any timer flags nor wake up the MCU, but when the MCU does wake up,
there is an active input capture flag and data from the first valid edge that
occurred during STOP mode. If any reset is used to exit STOP mode
then no input capture flag or data remains even if a valid input capture
edge occurred.
Technical Data
MC68HC(8)05PV8/A — Rev. 1.9
16-Bit Programmable Timer
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