MC68HC05PV8 Datasheet, PDF (84/196 Pages) Freescale Semiconductor, Inc – Techinal Data - rev 1.9

Technical Data
Freescale Semiconductor, Inc.
$3FF0 Bit 7
6
5
4
3
2
1
Bit 0
Read:
Write:
COPR
Reset:
Figure 5-3 COP Watchdog Timer Location Register (COPR)
5.8 Illegal Address Reset
An illegal address reset is generated when the CPU attempts to fetch an
instruction from either unimplemented address space ($0100 to $017F,
$0200 to $1FFF) monitor ROM ($3F00 to $3FEF) or I/O address space
($0000 to $003F).
The illegal address reset activates the internal pull-down device
connected to the RESET pin.
5.9 Disabled STOP Instruction Reset
When the mask option is selected to disable the STOP instruction,
execution of a STOP instruction results in an internal reset. This
activates the internal pull-down device connected to the RESET pin.
5.10 High Temperature Reset
The internal high temperature (HTR) reset is generated when the die
temperature rises above the high temperature threshold T_HTON. This
condition remains active until the temperature falls below the threshold
T_HTOFF.
This reset can be disabled by using a mask option.
Technical Data
MC68HC(8)05PV8/A — Rev. 1.9
Resets
For More Information On This Product,
Go to: www.freescale.com