IC61C6416 Datasheet, PDF(63/80 Page) Integrated Circuit Solution Inc – 64K X 16 HIGH-SPEED CMOS STATIC RAM

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IC61C6416 Datasheet, PDF (63/80 Pages) Integrated Circuit Solution Inc – 64K X 16 HIGH-SPEED CMOS STATIC RAM

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3.12.2

Self-Refresh Exit (SREFEX)

#, +

#, +

#+ %

#3

2!3

#!3

HYB18T256324Fâ[16/20/22]

256-Mbit DDR SGRAM

Functional Description

To exit the Self Refresh Mode, a stable external clock

is needed before setting CKE high asynchronously.

Once the Self-Refresh Exit command is registered, a

delay equal or longer than tXSC (minimum 200 Clock

Cycles) must be satisfied before any command can be

applied. During this time, the DLL is automatically

enabled, reset and calibrated.

CKE must remain HIGH for the entire Self-Refresh exit

period and commands must be gated off with CS held

HIGH. Alternately, NOP commands may be registered

on each positive clock edge during the Self Refresh exit

interval.

7%

! !

! !

$ON gT# ARE

Figure 49 Self Refresh Exit Command

#, +

#, +

#O M MA ND

.$

.$

.$

!#

#+ %

#, +# , + M US T

BESTAB LE

T8 3#

Figure 50 Self Refresh Exit

!#!N Y #O M MAN D

.$ ./ 0O R$ % 3% , # O MM AND

$O NgT# A RE

Table 29 Self Refresh Exit Timing Parameter for â1.6, â2.0 and â2.2 speed sorts

Parameter

Symbol

Limit Values

â1.6

â2.0

â2.2

min max min max min max

Self Refresh Exit time

tXSC

200 â

200 â

200 â

Units Notes

tCK

Data Sheet

63

Rev. 1.11, 04-2005

10292004-DOXT-FS0U

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