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IC61C6416 Datasheet, PDF (34/80 Pages) Integrated Circuit Solution Inc – 64K X 16 HIGH-SPEED CMOS STATIC RAM
◁
HYB18T256324F–[16/20/22]
256-Mbit DDR SGRAM
Functional Description
3.6
Bank / Row Activation (ACT)
#, +
#, +
#+ %
#3 
2!3 
#!3 
7% 
! ! 
2!
"! "! 
"!
Before a READ or WRITE command can be issued to
a bank, a row in that bank must be opened. This is
accomplished via the ACT command, which selects
both the bank and the row to be activated.
After opening a row by issuing an ACT command, a
READ or WRITE command may be issued after tRCD to
that row.
A subsequent ACT command to a different row in the
same bank can only be issued after the previous active
row has been closed (precharged). The minimum time
interval between successive ACT commands to the
same bank is defined by tRC.
A subsequent ACT command to another bank can be
issued while the first bank is being accessed, which
results in a reduction of total row-access overhead. The
minimum time interval between successive ACT
commands to different banks is defined by tRRD.
There is a minimum time tRAS between opening and
closing a row.
Figure 17
2! 2 O W! D DRE SS
"! " A NK!D D RE S S
$O NgT# A RE
Activating a specific row
#, +
#, +
#O M 
!# 4
! !  2O W
"! " ! "9
T2# $
27
#O L
"9
T2 !3
Figure 18 Bank Activation timing
02%
!
"9
T2 #
!# 4
2O W
"9
!#4
2OW
"8
T22 $
2O W2 O W! D DRE SS
#O L# O LU MN ! D DRE S S
"8" A NK 8
"9" A NK 9
27 2 % !$ OR7 2)4% C OM MAN D
02% 0 2% # ( ! 2 ' %C OM MAN D
!#4 ! # 4)6 ! 4% CO MMA ND
$O N gT# A RE
Data Sheet
34
Rev. 1.11, 04-2005
10292004-DOXT-FS0U
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