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IC61C6416 Datasheet, PDF (41/80 Pages) Integrated Circuit Solution Inc – 64K X 16 HIGH-SPEED CMOS STATIC RAM
HYB18T256324F–[16/20/22]
256-Mbit DDR SGRAM
Functional Description
3.7.4 Write with Autoprecharge





#, +
#, +
#O M 72 !
.$
$% 3
$% 3
$% 3
!
!  !
"#
!

$% 3

$% 3

$% 3

$% 3

$% 3

$% 3
7$ 1 3
7, 
T72! 
T20
$1
$ $ $ $
7$ 1 3
7, 
T2 !3- ).
SA TISFIED
"E GIN O F
!U TO PRE CH ARGE
T7 2! 
T20
$1
$ $ $ $
7$ 13
$1
7, 
$ $ $ $
T2 !3- ).
SA TISFIED
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!UTO P RECH ARGE
T72! 
T2 0
T2 !3- ).
SA TISFIED
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!UTO P RECH ARGE
Figure 24 Write with Autoprecharge
#O M #O M MAN D
!D DR!D D RE SS" #
7, 7 RITE, A TE NC Y
$O N gT#A RE
"#" A NK # O LU MN A DD RE SS
72! 7 2 )4% WITHA UTO P RE C HA RG E
$ $ ATA TO" #
$% 3 $ E SE LEC T
.$ . / 0O R$ ES E LEC T
1. Shown with nominal value of tDQSS
2. tWR/A starts at the first rising edge of CLK after the last valid edge of WDQS.
3. tRP starts after tWR/A has been expired.
4. when issuing a WR/A command please consider that the tRAS requirement also must be met at the beginning
of tRP
5. tWR/A * tCYC ≥ tWR
6. WDQS can only transition when data is applied at the chip input and during pre- and postambles
Data Sheet
41
Rev. 1.11, 04-2005
10292004-DOXT-FS0U