EP2C20F256C8N Datasheet, PDF (393/470 Pages) Altera Corporation – Cyclone II Device Handbook, Volume 1

Altera Corporation
February 2007
Configuring Cyclone II Devices
it feeds the next device’s nCE pin. After the first device in the chain
completes configuration, its nCEO pin transitions low to activate the
second device's nCE pin, which prompts the second device to begin
configuration. You can leave the nCEO pin of the last device unconnected
or use it as a user I/O pin after configuration. The nCEO pin is a
dual-purpose pin in Cyclone II devices.
1
The Quartus II software sets the Cyclone II device nCEO pin as
an output pin driving to ground by default. If the device is in a
chain, and the nCEO pin is connected to the next device’s nCE
pin, you must make sure that the nCEO pin is not used as a user
I/O pin after configuration. This software setting is in the
Dual-Purpose Pins tab of the Device & Pin Options dialog box
in Quartus II software.
Connect all other configuration pins (nCONFIG, nSTATUS, DCLK, DATA0,
and CONF_DONE) to every Cyclone II device in the chain. The
configuration signals may require buffering to ensure signal integrity and
prevent clock skew problems. Buffer the DCLK and DATA lines for every
fourth device.
When configuring multiple devices, configuration does not begin until all
devices release their OE or nSTATUS pins. Similarly, since all device
CONF_DONE pins are tied together, all devices initialize and enter user
mode at the same time.
You should not pull CONF_DONE low to delay initialization. Instead, use
the Quartus II software’s User-Supplied Start-Up Clock option to
synchronize the initialization of multiple devices that are not in the same
configuration chain. Devices in the same configuration chain initialize
together since their CONF_DONE pins are tied together.
Since all nSTATUS and CONF_DONE pins are connected, if any device
detects an error, configuration stops for the entire chain and the entire
chain must be reconfigured. For example, if there is an error when
configuring the first Cyclone II device, it resets the chain by pulling its
nSTATUS pin low. This low signal drives the OE pin low on the enhanced
configuration device and drives nSTATUS low on all FPGAs, which
causes them to enter a reset state.
If the Auto-restart configuration after error option is turned on, the
devices automatically initiate reconfiguration if an error occurs. The
FPGAs release their nSTATUS pins after a reset time-out period (40 µs
maximum). When all the nSTATUS pins are released and pulled high, the
configuration device reconfigures the chain. If the Auto-restart
configuration after error option is turned off, a microprocessor or
controller must monitor the nSTATUS pin for errors and then pulse
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Cyclone II Device Handbook, Volume 1