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EP2C20F256C8N Datasheet, PDF (109/470 Pages) Altera Corporation – Cyclone II Device Handbook, Volume 1 | |||
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DC Characteristics and Timing Specifications
Single-Ended I/O Standards
Tables 5â6 and 5â7 provide operating condition information when using
single-ended I/O standards with Cyclone II devices. Table 5â5 provides
descriptions for the voltage and current symbols used in Tables 5â6 and
5â7.
Table 5â5. Voltage and Current Symbol Definitions
Symbol
VC C I O
VR E F
VI L
VI H
VO L
VO H
IO L
IO H
VT T
Definition
Supply voltage for single-ended inputs and for output drivers
Reference voltage for setting the input switching threshold
Input voltage that indicates a low logic level
Input voltage that indicates a high logic level
Output voltage that indicates a low logic level
Output voltage that indicates a high logic level
Output current condition under which VO L is tested
Output current condition under which VO H is tested
Voltage applied to a resistor termination as specified by
HSTL and SSTL standards
Table 5â6. Recommended Operating Conditions for User I/O Pins Using Single-Ended I/O Standards
Note (1) (Part 1 of 2)
I/O Standard
VCCIO (V)
Min Typ Max
VREF (V)
Min Typ Max
VIL (V)
Max
VIH (V)
Min
3.3-V LVTTL and 3.135 3.3 3.465 â
â
â
0.8
1.7
LVCMOS
2.5-V LVTTL and 2.375 2.5 2.625 â
â
â
0.7
1.7
LVCMOS
1.8-V LVTTL and 1.710 1.8 1.890 â
â
â
0.35 Ã VC C I O
LVCMOS
0.65 Ã VC C I O
1.5-V LVCMOS 1.425 1.5 1.575 â
â
â
0.35 Ã VC C I O
0.65 Ã VC C I O
PCI and PCI-X 3.000 3.3 3.600 â
â
â
0.3 Ã VC C I O
0.5 Ã VC C I O
SSTL-2 class I 2.375 2.5 2.625 1.19 1.25 1.31 VRE F â 0.18 (DC) VR E F + 0.18 (DC)
VR E F â 0.35 (AC) VR E F + 0.35 (AC)
SSTL-2 class II 2.375 2.5 2.625 1.19 1.25 1.31 VRE F â 0.18 (DC) VR E F + 0.18 (DC)
VR E F â 0.35 (AC) VR E F + 0.35 (AC)
SSTL-18 class I 1.7
1.8
1.9 0.833 0.9 0.969 VR E F â 0.125 (DC) VR E F + 0.125 (DC)
VR E F â 0.25 (AC) VR E F + 0.25 (AC)
Altera Corporation
February 2008
5â5
Cyclone II Device Handbook, Volume 1
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