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EP2C20F256C8N Datasheet, PDF (355/470 Pages) Altera Corporation – Cyclone II Device Handbook, Volume 1
13. Configuring Cyclone II
Devices
CII51013-3.1
Introduction
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Cyclone® II devices use SRAM cells to store configuration data. Since
SRAM memory is volatile, configuration data must be downloaded to
Cyclone II devices each time the device powers up. You can use the active
serial (AS) configuration scheme, which can operate at a DCLK frequency
up to 40 MHz, to configure Cyclone II devices. You can also use the
passive serial (PS) and Joint Test Action Group (JTAG)-based
configuration schemes to configure Cyclone II devices. Additionally,
Cyclone II devices can receive a compressed configuration bitstream and
decompress this data on-the-fly, reducing storage requirements and
configuration time.
This chapter explains the Cyclone II configuration features and describes
how to configure Cyclone II devices using the supported configuration
schemes. This chapter also includes configuration pin descriptions and
the Cyclone II configuration file format.
For more information on setting device configuration options or creating
configuration files, see the Software Settings chapter in the Configuration
Handbook.
Cyclone II
Configuration
Overview
You can use the AS, PS, and JTAG configuration schemes to configure
Cyclone II devices. You can select which configuration scheme to use by
driving the Cyclone II device MSEL pins either high or low as shown in
Table 13–1. The MSEL pins are powered by the VCCIO power supply of the
bank they reside in. The MSEL[1..0] pins have 9-kΩ internal pull-down
resistors that are always active. During power-on reset (POR) and
reconfiguration, the MSEL pins have to be at LVTTL VIL or VIH levels to be
considered a logic low or logic high, respectively. Therefore, to avoid any
problems with detecting an incorrect configuration scheme, you should
connect the MSEL[] pins to the VCCIO of the I/O bank they reside in and
GND without any pull-up or pull-down resistors. The MSEL[] pins
should not be driven by a microprocessor or another device.
Altera Corporation
February 2007
13–1