EP2C20F256C8N Datasheet, PDF (348/470 Pages) Altera Corporation – Cyclone II Device Handbook, Volume 1

Operational Modes
1 When the signa and signb signals are unused, the Quartus^® II
software sets the multiplier to perform unsigned multiplication
by default.
f
Output Registers
You can choose to register the embedded multiplier output using the
output registers in 18- or 36-bit sections depending on the operational
mode of the multiplier. The following control signals are available to each
output register within the embedded multiplier:
■ clock
■ clock enable
■ asynchronous clear
All input and output registers within a single embedded multiplier are
fed by the same clock, clock enable, or asynchronous clear signal.
See the Cyclone II Architecture chapter in Volume 1 of the Cyclone II
Device Handbook for more information on the embedded multiplier
routing and interface.
Operational
Modes
f
The embedded multiplier can be used in one of two operational modes,
depending on the application needs:
■ One 18-bit multiplier
■ Up to two 9-bit independent multipliers
The Quartus II software includes megafunctions used to control the mode
of operation of the multipliers. After you have made the appropriate
parameter settings using the megafunction’s MegaWizard^® Plug-In
Manager, the Quartus II software automatically configures the embedded
multiplier.
1 The Cyclone II embedded multipliers can also be used to
implement multiplier adder and multiplier accumulator
functions where the multiplier portion of the function is
implemented using embedded multipliers and the adder or
accumulator function is implemented in logic elements (LEs).
For more information on megafunction and Quartus II support for
Cyclone II embedded multipliers, see the “Software Support” section.
12–6
Cyclone II Device Handbook, Volume 1
Altera Corporation
February 2007